Embodiments of the present invention relate to printed circuit board (PCB) technology and more particularly to interconnecting a component with a PCB.
Within the electronics industry there is a continuing effort to increase device density and speed. As device density increases, the number of interconnections per square inch of an electronic component may increase accordingly. To accommodate an increased number of interconnections, some electronic components are packaged in a ball grid array (BGA) package with an array of solder balls formed on a bottom surface. As illustrated in FIG. 1, a BGA component 110 may be interconnected with a printed circuit board (PCB) 120 by aligning an array of solder balls 112 having an array pitch xe2x80x9cPxe2x80x9d with a corresponding array of contact pads, such as contact pads 122 and 124, formed on a top surface of the PCB 120. The solder balls 112 may be reflowed to make electrical connections between the solder balls 112 and the contact pads 122 and 124. A layer of solder mask 160 may prevent solder from wicking to adjacent contact pads during reflow.
Typically, the PCB 120 has numerous layers of conductive traces to route signals from the BGA component 110 to other electronic components mounted on both sides of the PCB 120. The PCB 120 may also have a number of vias to route signals from contact pads to the signal routing layers. For example, a signal may travel from the solder ball 112 to the contact pad 122 and through a via 130 to a conductive trace on a bottom surface signal routing layer. The via 130 is typically formed by drilling a hole through the contact pad 122 and plating the drilled hole with a plating material 132. For example, a hole having a diameter D1 from 10-16 mils may be drilled through a contact pad having a diameter D3 from 18-24 mils. To make efficient use of the signal routing area on the PCB 120 beneath the BGA component 110, one or more conductive traces may be routed between adjacent contact pads 122 and 124.
However, as device density increases, the BGA array pitch may shrink and the contact pads may occupy a larger percentage of signal routing area beneath the BGA component which may prevent signal routing between adjacent contact pads. One approach to increase the signal routing area is to reduce the diameter of the contact pads. However, as contact pad diameter decreases, it may become more difficult to drill a via hole through the contact pad due to drill wander and tolerance errors in the drilling process. Errors in the drilling process may lead to non-uniformity in contact pad configuration, which may result in manufacturing errors during assembly of the PCB, and may ultimately lead to scrapping the PCB. Another approach to increase signal routing area is to reduce the width and spacing of conductive traces. However, this approach may require more complicated manufacturing processes which may increase overall PCB cost.